Compressed Sensing Analog to Digital Converter with SAR ADC Core

TITLE: Compressed Sensing Analog to Digital Converter with SAR ADC Core (Completed)

Advisors: Sameer R Sonkusale (Tufts), Tim Hancock (Lincoln Labs)

Researcher: Mike Trakimas

Sponsor: Lincoln Labs

ABSTRACT:

The aim of this project is to build a very low power SAR ADC for a wake up receiver. The SAR ADC is expected to operate at 10bit resolution with 10-Msample/s conversion rate. Expected power dissipation is around 100 uW. The SAR ADC is also employed as random sampling compressed sensing analog to digital converter. Compressed sensing allows one to acquire sample at less than sampling rate achieving energy efficiency for conversion and transmission of data. The burden is transmitted to the receive who will use reconstruction algorithms to either recover the original data or perform feature extraction directly on the compressed data.

PUBLICATIONS:

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